Résumé

Experience

January 2022—Present INRIA, Post-doc, Grenoble

Post-doctoral researcher, supervised by Pascal Fradet and Alain Girault.

Scheduling of task graphs to minimize memory peak, applied to Deep Neural Networks.

January—December 2021 IETR/INSA, Post-doc, Rennes

Post-doctoral researcher, supervised by Mickaël Dardaillon and Jean-François Nezan.

Started the support of FPGA in the PREESM tool, with automatic computation of buffer sizes.

October 2017—November 2020 IETR/INSA, Ph.D. student, Rennes

Ph.D. student, directed by Jean-François Nezan and supervised by Karol Desnos. Thesis HERE

Automatic configuration of an SDF¹ image processing application to meet real-time constraints. Implementation in the PREESM tool.

November 2018 IBM Research Labs, Visitor, Haifa

Research visit to the team led by Michael Masin, in order to model scheduling of SDF¹ graphs with Linear Programming in CPLEX tool.

October 2015—Septembre 2017 INRIA, Research Engineer, Rennes

Junior Research Engineer supervised by Loïc Besnard, Thierry Gautier and Jean-Pierre Talpin.

Translation of real-time systems scheduling properties written in Architecture Analysis and Design Language (AADL) to SIGNAL. Implementation of algorithms to synthesize periods of CSDF² graphs.

February–July 2015 INRIA, Intern, Bordeaux

Master student, supervised by Olivier Aumage and Denis Barthou.

Design of a stencil parallel library in C++, based on the new parallelism interface SYCL.

June–August 2014 RedBite Solutions, Trainee, Cambridge

Participation to continuous integration tests’ creation of a Vaadin web application, design of a collection and analysis system for RFID readers’ statistics.

October 2013—March 2014 Enseirb-Matmeca, School project, Bordeaux

July 2013 Thales Alenia Space, Trainee, Cannes

Participation to a file migration process to use a new document management system (DMS).

2017—2020 IETR laboratory and INSA engineering school, Rennes

Ph.D. degree, directed by Jean-François Nezan and supervised by Karol Desnos. Thesis HERE Thesis speciality: Signal, Image, Vision. Thesis title: Modeling, Scheduling, Pipelining and Configuration of Synchronous Dataflow Graphs with Throughput Constraints

2012–2015 Enseirb-Matmeca Graduate School of Engineering, Bordeaux

Engineer and Master degrees in computer science, specialized in High Performance Computing.

2009–2012 Pothier High School, Orléans

“Classes préparatoires”: Three-year intensive Maths and Physics course in preparation for the selective entrance examination to french engineering schools.

2009 Bertran de Born High School, Périgueux

“Baccalauréat scientifique”: Equivalent to ’A’ levels in Maths, Physics, Sciences.

French: Native speaker
English: Good command, read, spoken and written (TOEIC: 920/990 – EU level: B2)
German: Fair command